Technical Field
The present invention generally relates to semiconductor processing, and more particularly to methods and structures for fin reveals that preserve shallow trench isolation height (e.g., uniform fin reveal depth) regardless of fin density.
Description of the Related Art
Fin reveal processes typically employ a buffered HF etch process (wet etch) and an oxide removal etch (oxide etch) to reveal fins through an oxide layer during fin field effect transistor manufacturing. The wet etch process etches dense fin region regions (dense regions) at a faster etch rate while the oxide removal etch process etches isolation regions (iso regions) at a faster etch rate. The wet etch process does most of the material removal during the fin reveal, and the oxide removal process tunes the iso region fin reveal depth to attempt to match the fin reveal depth in the dense region. The etch rate of wet etch (e.g., HF) is very sensitive to oxide material quality and volume. When the oxide layer (e.g., shallow trench isolation (STI) material) changes or includes fin pitch changes, the fin reveal process needs to be re-tuned to provide a good balance between iso region and dense region differences. This is very difficult to do especially given the small process window for the two etch processes for the fin reveal, which is not comparable with multi-fin pitch CMOS (complementary metal oxide semiconductor) patterning.